In recent years, along with the performance improvement of semiconductor devices in electronic devices, higher speed signal transmission and increased power consumption are becoming a problem. In addition, in order to stably supply power to a semiconductor integrated circuit chip (IC chip), reduction of power supply impedance is strongly demanded on a package substrate.
For example, related technologies are disclosed in Japanese Laid-open Patent Publication No. 2001-267751 or Japanese Laid-open Patent Publication No. 2006-261658.